@@ -38,7 +38,8 @@ static gpio_irq_handler irq_handler;
3838static GPIO_Type * const gpio_addrs [] = GPIO_BASE_PTRS ;
3939
4040/* Array of PORT IRQ number. */
41- static const IRQn_Type gpio_irqs [] = GPIO_COMBINED_IRQS ;
41+ static const IRQn_Type gpio_low_irqs [] = GPIO_COMBINED_LOW_IRQS ;
42+ static const IRQn_Type gpio_high_irqs [] = GPIO_COMBINED_HIGH_IRQS ;
4243
4344static void handle_interrupt_in (PortName port , int ch_base )
4445{
@@ -117,8 +118,6 @@ void gpio5_irq(void)
117118
118119int gpio_irq_init (gpio_irq_t * obj , PinName pin , gpio_irq_handler handler , uint32_t id )
119120{
120- uint32_t int_index ;
121-
122121 if (pin == NC ) {
123122 return -1 ;
124123 }
@@ -156,14 +155,14 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32
156155 break ;
157156 }
158157
159- int_index = 2 * obj -> port ;
160158 if (obj -> pin > 15 ) {
161- int_index -= 1 ;
159+ NVIC_SetVector (gpio_high_irqs [obj -> port ], vector );
160+ NVIC_EnableIRQ (gpio_high_irqs [obj -> port ]);
161+ } else {
162+ NVIC_SetVector (gpio_low_irqs [obj -> port ], vector );
163+ NVIC_EnableIRQ (gpio_low_irqs [obj -> port ]);
162164 }
163165
164- NVIC_SetVector (gpio_irqs [int_index ], vector );
165- NVIC_EnableIRQ (gpio_irqs [int_index ]);
166-
167166 obj -> ch = ch_base + obj -> pin ;
168167 channel_ids [obj -> ch ] = id ;
169168
@@ -243,12 +242,20 @@ void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
243242
244243void gpio_irq_enable (gpio_irq_t * obj )
245244{
246- NVIC_EnableIRQ (gpio_irqs [obj -> port ]);
245+ if (obj -> pin > 15 ) {
246+ NVIC_EnableIRQ (gpio_high_irqs [obj -> port ]);
247+ } else {
248+ NVIC_EnableIRQ (gpio_low_irqs [obj -> port ]);
249+ }
247250}
248251
249252void gpio_irq_disable (gpio_irq_t * obj )
250253{
251- NVIC_DisableIRQ (gpio_irqs [obj -> port ]);
254+ if (obj -> pin > 15 ) {
255+ NVIC_DisableIRQ (gpio_high_irqs [obj -> port ]);
256+ } else {
257+ NVIC_DisableIRQ (gpio_low_irqs [obj -> port ]);
258+ }
252259}
253260
254261#endif
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