3232int mbed_sdk_inited = 0 ;
3333extern void SetSysClock (void );
3434
35- #if MBED_CONF_TARGET_LSE_AVAILABLE
35+ #if defined(RCC_LSE_HIGHDRIVE_MODE ) || defined(RCC_LSEDRIVE_HIGH )
36+ # define LSE_CONFIG_AVAILABLE
37+ #endif
3638
37- // set defaults for LSE drive load level, with exception for F4_g2 MCU
38- #if MBED_CONF_TARGET_LSE_DRIVE_LOAD_LEVEL
39- # define LSE_DRIVE_LOAD_LEVEL MBED_CONF_TARGET_LSE_DRIVE_LOAD_LEVEL
40- #else
41- # ifdef RCC_LSE_HIGHDRIVE_MODE
42- # define LSE_DRIVE_LOAD_LEVEL RCC_LSE_HIGHDRIVE_MODE
39+ // set defaults for LSE drive load level
40+ #if defined(LSE_CONFIG_AVAILABLE )
41+
42+ # ifdef MBED_CONF_TARGET_LSE_DRIVE_LOAD_LEVEL
43+ # define LSE_DRIVE_LOAD_LEVEL MBED_CONF_TARGET_LSE_DRIVE_LOAD_LEVEL
4344# else
44- # define LSE_DRIVE_LOAD_LEVEL RCC_LSEDRIVE_MEDIUMHIGH
45+ # ifdef RCC_LSE_HIGHDRIVE_MODE
46+ # define LSE_DRIVE_LOAD_LEVEL RCC_LSE_HIGHDRIVE_MODE
47+ # else
48+ # define LSE_DRIVE_LOAD_LEVEL RCC_LSEDRIVE_MEDIUMHIGH
49+ # endif
4550# endif
46- #endif
51+
4752
4853/**
4954 * @brief configure the LSE crystal driver load
@@ -77,13 +82,13 @@ static void LSEDriveConfig(void) {
7782
7883 // set LSE drive level. Exception only for F4_g2 series
7984 HAL_PWR_EnableBkUpAccess ();
80- #ifdef __HAL_RCC_LSEDRIVE_CONFIG
85+ #if defined( LSE_CONFIG_AVAILABLE )
8186 __HAL_RCC_LSEDRIVE_CONFIG (LSE_DRIVE_LOAD_LEVEL );
8287 #else
8388 HAL_RCCEx_SelectLSEMode (LSE_DRIVE_LOAD_LEVEL );
8489 #endif
8590}
86- #endif // MBED_CONF_TARGET_LSE_AVAILABLE
91+ #endif // LSE_CONFIG_AVAILABLE
8792
8893/**
8994 * @brief Setup the target board-specific configuration
@@ -174,7 +179,7 @@ void mbed_sdk_init()
174179
175180 /* Configure the System clock source, PLL Multiplier and Divider factors,
176181 AHB/APBx prescalers and Flash settings */
177- #if MBED_CONF_TARGET_LSE_AVAILABLE
182+ #if defined( LSE_CONFIG_AVAILABLE )
178183 // LSE maybe used later, but crystal load drive setting is necessary before
179184 // enabling LSE
180185 LSEDriveConfig ();
@@ -201,7 +206,7 @@ void mbed_sdk_init()
201206
202207 /* Configure the System clock source, PLL Multiplier and Divider factors,
203208 AHB/APBx prescalers and Flash settings */
204- #if MBED_CONF_TARGET_LSE_AVAILABLE
209+ #if defined( LSE_CONFIG_AVAILABLE )
205210 LSEDriveConfig ();
206211#endif
207212 SetSysClock ();
0 commit comments